VEXTRACTF128

MEM0:w:dq:f64 REG0=YMM_R():r:qq:f64 IMM0:r:b REG0=XMM_B():w:dq:f64 REG1=YMM_R():r:qq:f64 IMM0:r:b

x86_64 X86_LEGACY AVX AVX source: xed

XED_VEXTRACTF128_X86_LEGACY_ONEBYTE_19_268554

Encoding

encoding_kindX86_LEGACY
opcode_bytes19 19
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l1
imm_size_bytes1
exception_classavx-type-6
cpl3
raw_encodingVV1 0x19 norexw_prefix VL256 V66 V0F3A NOVSR MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() UIMM8() VV1 0x19 norexw_prefix VL256 V66 V0F3A NOVSR MOD[0b11] MOD=3 REG[rrr] RM[nnn] UIMM8()

Operands (6)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 MEM0 MEM w W EXPLICIT MODRM_RM
1 REG0 REG f64 R EXPLICIT MODRM_REG
2 IMM0 IMM b R EXPLICIT IMM
3 REG1 REG w W EXPLICIT MODRM_REG
4 REG2 REG f64 R EXPLICIT MODRM_REG
5 IMM1 IMM b R EXPLICIT IMM

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.