VFMADDSD

REG0=XMM_R():w:dq:f64 REG1=XMM_N():r:q:f64 MEM0:r:q:f64 REG2=XMM_SE():r:q:f64 REG0=XMM_R():w:dq:f64 REG1=XMM_N():r:q:f64 REG2=XMM_B():r:q:f64 REG3=XMM_SE():r:q:f64 REG0=XMM_R():w:dq:f64 REG1=XMM_N():r:q:f64 REG2=XMM_SE():r:q:f64 MEM0:r:q:f64 REG0=XMM_R():w:dq:f64 REG1=XMM_N():r:q:f64 REG2=XMM_SE():r:q:f64 REG3=XMM_B():r:q:f64

x86_64 X86_LEGACY FMA4 FMA4 source: xed

XED_VFMADDSD_X86_LEGACY_ONEBYTE_6B_375499

Encoding

encoding_kindX86_LEGACY
opcode_bytes6B 6B 6B 6B
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
attributesSIMD_SCALAR MXCSR AMDONLY
cpl3
raw_encodingVV1 0x6B V66 W0 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() SE_IMM8() VV1 0x6B V66 W0 V0F3A MOD[0b11] MOD=3 REG[rrr] RM[nnn] SE_IMM8() VV1 0x6B V66 W1 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() SE_IMM8() VV1 0x6B V66 W1 V0F3A MOD[0b11] MOD=3 REG[rrr] RM[nnn] SE_IMM8()

Operands (16)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 REG1 REG q R EXPLICIT MODRM_REG
2 MEM0 MEM q R EXPLICIT MODRM_RM
3 REG2 REG q R EXPLICIT MODRM_REG
4 REG3 REG w W EXPLICIT MODRM_REG
5 REG4 REG q R EXPLICIT MODRM_REG
6 REG5 REG q R EXPLICIT MODRM_REG
7 REG6 REG q R EXPLICIT MODRM_REG
8 REG7 REG w W EXPLICIT MODRM_REG
9 REG8 REG q R EXPLICIT MODRM_REG
10 REG9 REG q R EXPLICIT MODRM_REG
11 MEM1 MEM q R EXPLICIT MODRM_RM
12 REG10 REG w W EXPLICIT MODRM_REG
13 REG11 REG q R EXPLICIT MODRM_REG
14 REG12 REG q R EXPLICIT MODRM_REG
15 REG13 REG q R EXPLICIT MODRM_REG

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.