VFMULCPH

REG0=YMM_R3():w:qq:2f16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=YMM_N3():r:qq:2f16 REG3=YMM_B3():r:qq:2f16

x86_64 X86_LEGACY FP16 AVX512_FP16_256 source: xed

XED_VFMULCPH_YMM2f16_MASKmskw_YMM2f16_YMM2f16_AVX512

Encoding

encoding_kindX86_LEGACY
opcode_bytesD6
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l1
attributesMASKOP_EVEX MXCSR NO_SRC_DEST_MATCH
exception_classAVX512-E4
cpl3
raw_encodingEVV 0xD6 VF3 MAP6 MOD[0b11] MOD=3 BCRC=0 UBIT=1 REG[rrr] RM[nnn] W0 VL256

Operands (4)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 REG1 REG R EXPLICIT MODRM_REG
2 REG2 REG R EXPLICIT MODRM_REG
3 REG3 REG R EXPLICIT MODRM_REG

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.