VFNMADD132PH

FP16 AVX512_FP16_128 x86_64

6 encoding forms.

XED_VFNMADD132PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512
REG0=XMM_R3():rw:dq:f16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:f16 MEM0:r:vv:f16:TXT=BCASTSTR
X86_LEGACY 9C /r AVX512_FP16_128
XED_VFNMADD132PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512
REG0=XMM_R3():rw:dq:f16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:f16 REG3=XMM_B3():r:dq:f16
X86_LEGACY 9C /r AVX512_FP16_128
XED_VFNMADD132PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512
REG0=YMM_R3():rw:qq:f16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=YMM_N3():r:qq:f16 MEM0:r:vv:f16:TXT=BCASTSTR
X86_LEGACY 9C /r AVX512_FP16_256
XED_VFNMADD132PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512
REG0=YMM_R3():rw:qq:f16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=YMM_N3():r:qq:f16 REG3=YMM_B3():r:qq:f16
X86_LEGACY 9C /r AVX512_FP16_256
XED_VFNMADD132PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512
REG0=ZMM_R3():rw:zf16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_N3():r:zf16 MEM0:r:vv:f16:TXT=BCASTSTR
X86_LEGACY 9C /r AVX512_FP16_512
XED_VFNMADD132PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512
REG0=ZMM_R3():rw:zf16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_N3():r:zf16 REG3=ZMM_B3():r:zf16
X86_LEGACY 9C /r AVX512_FP16_512