VFPCLASSPS
AVX512 AVX512DQ_128 x86_64
6 encoding forms.
XED_VFPCLASSPS_MASKmskw_MASKmskw_MEMf32_IMM8_AVX512_VL128
REG0=MASK_R():w:mskw REG1=MASK1():r:mskw MEM0:r:vv:f32:TXT=BCASTSTR IMM0:r:b
XED_VFPCLASSPS_MASKmskw_MASKmskw_MEMf32_IMM8_AVX512_VL256
REG0=MASK_R():w:mskw REG1=MASK1():r:mskw MEM0:r:vv:f32:TXT=BCASTSTR IMM0:r:b
XED_VFPCLASSPS_MASKmskw_MASKmskw_MEMf32_IMM8_AVX512_VL512
REG0=MASK_R():w:mskw REG1=MASK1():r:mskw MEM0:r:vv:f32:TXT=BCASTSTR IMM0:r:b
XED_VFPCLASSPS_MASKmskw_MASKmskw_XMMf32_IMM8_AVX512
REG0=MASK_R():w:mskw REG1=MASK1():r:mskw REG2=XMM_B3():r:dq:f32 IMM0:r:b
XED_VFPCLASSPS_MASKmskw_MASKmskw_YMMf32_IMM8_AVX512
REG0=MASK_R():w:mskw REG1=MASK1():r:mskw REG2=YMM_B3():r:qq:f32 IMM0:r:b
XED_VFPCLASSPS_MASKmskw_MASKmskw_ZMMf32_IMM8_AVX512
REG0=MASK_R():w:mskw REG1=MASK1():r:mskw REG2=ZMM_B3():r:zf32 IMM0:r:b