VFRCZPD

REG0=XMM_R():w:dq:f64 MEM0:r:dq:f64 REG0=XMM_R():w:dq:f64 REG1=XMM_B():r:dq:f64 REG0=YMM_R():w:qq:f64 MEM0:r:qq:f64 REG0=YMM_R():w:qq:f64 REG1=YMM_B():r:qq:f64

x86_64 X86_LEGACY XOP XOP source: xed

XED_VFRCZPD_X86_LEGACY_ONEBYTE_81_772322

Encoding

encoding_kindX86_LEGACY
opcode_bytes81 81 81 81
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l1
attributesMXCSR AMDONLY
cpl3
raw_encodingXOPV 0x81 VNP W0 VL128 NOVSR XMAP9 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() XOPV 0x81 VNP W0 VL128 NOVSR XMAP9 MOD[0b11] MOD=3 REG[rrr] RM[nnn] XOPV 0x81 VNP W0 VL256 NOVSR XMAP9 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() XOPV 0x81 VNP W0 VL256 NOVSR XMAP9 MOD[0b11] MOD=3 REG[rrr] RM[nnn]

Operands (8)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 MEM0 MEM f64 R EXPLICIT MODRM_RM
2 REG1 REG w W EXPLICIT MODRM_REG
3 REG2 REG f64 R EXPLICIT MODRM_REG
4 REG3 REG w W EXPLICIT MODRM_REG
5 MEM1 MEM f64 R EXPLICIT MODRM_RM
6 REG4 REG w W EXPLICIT MODRM_REG
7 REG5 REG f64 R EXPLICIT MODRM_REG

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.