VFRCZSS
REG0=XMM_R():w:dq:f32 MEM0:r:d:f32 REG0=XMM_R():w:dq:f32 REG1=XMM_B():r:d:f32
x86_64 X86_LEGACY XOP XOP source: xed
XED_VFRCZSS_X86_LEGACY_ONEBYTE_82_399554
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | 82 82 |
| opcode_map | ONEBYTE |
| mandatory_prefix | - |
| has_modrm | True |
| vex_l | 0 |
| attributes | SIMD_SCALAR MXCSR AMDONLY |
| cpl | 3 |
| raw_encoding | XOPV 0x82 VNP W0 VL128 NOVSR XMAP9 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() XOPV 0x82 VNP W0 VL128 NOVSR XMAP9 MOD[0b11] MOD=3 REG[rrr] RM[nnn] |
Operands (4)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | REG0 | REG | w | W | EXPLICIT | MODRM_REG | |
| 1 | MEM0 | MEM | d | R | EXPLICIT | MODRM_RM | |
| 2 | REG1 | REG | w | W | EXPLICIT | MODRM_REG | |
| 3 | REG2 | REG | d | R | EXPLICIT | MODRM_REG |
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.