VGATHERDPD
REG0=YMM_R():crw:qq:f64 MEM0:r:q:f64 REG1=YMM_N():rw:qq:i64 REG0=XMM_R():crw:dq:f64 MEM0:r:q:f64 REG1=XMM_N():rw:dq:i64
x86_64 X86_LEGACY GATHER AVX2GATHER source: xed
XED_VGATHERDPD_YMMf64_MEMf64_YMMi64_VL256 VGATHERDPD_XMMf64_MEMf64_XMMi64_VL128
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | 92 92 |
| opcode_map | ONEBYTE |
| mandatory_prefix | - |
| has_modrm | True |
| vex_l | 0 |
| attributes | gather DWORD_INDICES ELEMENT_SIZE_q SPECIAL_AGEN_REQUIRED |
| exception_class | avx-type-12 |
| cpl | 3 |
| raw_encoding | VV1 0x92 VL256 V66 V0F38 W1 MOD[mm] MOD!=3 REG[rrr] RM[nnn] RM=4 VMODRM_XMM() eanot16 VV1 0x92 VL128 V66 V0F38 W1 MOD[mm] MOD!=3 REG[rrr] RM[nnn] RM=4 VMODRM_XMM() eanot16 |
Operands (6)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | REG0 | REG | f64 | R | EXPLICIT | MODRM_REG | |
| 1 | MEM0 | MEM | q | R | EXPLICIT | MODRM_RM | |
| 2 | REG1 | REG | RW | EXPLICIT | MODRM_REG | ||
| 3 | REG2 | REG | f64 | R | EXPLICIT | MODRM_REG | |
| 4 | MEM1 | MEM | q | R | EXPLICIT | MODRM_RM | |
| 5 | REG3 | REG | RW | EXPLICIT | MODRM_REG |
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.