VGETEXPPS

REG0=XMM_R3():w:dq:f32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_B3():r:dq:f32

x86_64 X86_LEGACY AVX512 AVX512F_128 source: xed

XED_VGETEXPPS_XMMf32_MASKmskw_XMMf32_AVX512

Encoding

encoding_kindX86_LEGACY
opcode_bytes42
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l0
attributesMASKOP_EVEX MXCSR USES_DAZ
exception_classAVX512-E2
cpl3
raw_encodingEVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 UBIT=1 REG[rrr] RM[nnn] W0 VL128 NOEVSR

Operands (3)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 REG1 REG R EXPLICIT MODRM_REG
2 REG2 REG f32 R EXPLICIT MODRM_REG

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.