VGF2P8AFFINEINVQB

REG0=ZMM_R3():w:zu8 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_N3():r:zu8 MEM0:r:vv:u64:TXT=BCASTSTR IMM0:r:b

x86_64 X86_LEGACY GFNI AVX512_GFNI_512 source: xed

XED_VGF2P8AFFINEINVQB_ZMMu8_MASKmskw_ZMMu8_MEMu64_IMM8_AVX512

Encoding

encoding_kindX86_LEGACY
opcode_bytesCF
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l2
imm_size_bytes1
attributesMASKOP_EVEX DISP8_FULL BROADCAST_ENABLED
exception_classAVX512-E4
cpl3
raw_encodingEVV 0xCF V66 V0F3A MOD[mm] MOD!=3 UBIT=1 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_64_BITS() NELEM_FULL()

Operands (5)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 REG1 REG R EXPLICIT MODRM_REG
2 REG2 REG R EXPLICIT MODRM_REG
3 MEM0 MEM R EXPLICIT MODRM_RM
4 IMM0 IMM b R EXPLICIT IMM

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.