VMINMAXBF16

AVX512 AVX512_MINMAX_128 x86_64

6 encoding forms.

XED_VMINMAXBF16_XMMbf16_MASKmskw_XMMbf16_MEMbf16_IMM8_AVX512
REG0=XMM_R3():w:dq:bf16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:bf16 MEM0:r:vv:bf16:TXT=BCASTSTR IMM0:r:b
X86_LEGACY 52 /r AVX512_MINMAX_128
XED_VMINMAXBF16_XMMbf16_MASKmskw_XMMbf16_XMMbf16_IMM8_AVX512
REG0=XMM_R3():w:dq:bf16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:bf16 REG3=XMM_B3():r:dq:bf16 IMM0:r:b
X86_LEGACY 52 /r AVX512_MINMAX_128
XED_VMINMAXBF16_YMMbf16_MASKmskw_YMMbf16_MEMbf16_IMM8_AVX512
REG0=YMM_R3():w:qq:bf16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=YMM_N3():r:qq:bf16 MEM0:r:vv:bf16:TXT=BCASTSTR IMM0:r:b
X86_LEGACY 52 /r AVX512_MINMAX_256
XED_VMINMAXBF16_YMMbf16_MASKmskw_YMMbf16_YMMbf16_IMM8_AVX512
REG0=YMM_R3():w:qq:bf16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=YMM_N3():r:qq:bf16 REG3=YMM_B3():r:qq:bf16 IMM0:r:b
X86_LEGACY 52 /r AVX512_MINMAX_256
XED_VMINMAXBF16_ZMMbf16_MASKmskw_ZMMbf16_MEMbf16_IMM8_AVX512
REG0=ZMM_R3():w:zbf16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_N3():r:zbf16 MEM0:r:vv:bf16:TXT=BCASTSTR IMM0:r:b
X86_LEGACY 52 /r AVX512_MINMAX_512
XED_VMINMAXBF16_ZMMbf16_MASKmskw_ZMMbf16_ZMMbf16_IMM8_AVX512
REG0=ZMM_R3():w:zbf16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_N3():r:zbf16 REG3=ZMM_B3():r:zbf16 IMM0:r:b
X86_LEGACY 52 /r AVX512_MINMAX_512