VMOVD
REG0=XMM_R3():w:dq:u32 REG1=GPR32_B():r:d:u32 REG0=XMM_R3():w:dq:u32 REG1=GPR32_B():r:d:u32
x86_64 X86_LEGACY DATAXFER AVX512F_128N source: xed
XED_VMOVD_XMMu32_GPR32u32_AVX512 VMOVD_XMMu32_GPR32u32_AVX512
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | 6E 6E |
| opcode_map | ONEBYTE |
| mandatory_prefix | - |
| has_modrm | True |
| vex_l | 0 |
| requires_mode | long |
| exception_class | AVX512-E9NF |
| cpl | 3 |
| raw_encoding | EVV 0x6E V66 V0F MOD[0b11] MOD=3 BCRC=0 UBIT=1 REG[rrr] RM[nnn] VL128 not64 NOEVSR ZEROING=0 MASK=0 EVV 0x6E V66 V0F MOD[0b11] MOD=3 BCRC=0 UBIT=1 REG[rrr] RM[nnn] VL128 mode64 W0 NOEVSR ZEROING=0 MASK=0 |
Operands (4)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | REG0 | REG | w | W | EXPLICIT | MODRM_REG | |
| 1 | REG1 | REG | d | R | EXPLICIT | MODRM_REG | |
| 2 | REG2 | REG | w | W | EXPLICIT | MODRM_REG | |
| 3 | REG3 | REG | d | R | EXPLICIT | MODRM_REG |
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.