VMOVD

REG0=XMM_R():w:dq REG1=VGPR32_B():r:d REG0=VGPR32_B():w:d REG1=XMM_R():r:d REG0=XMM_R():w:dq REG1=VGPR32_B():r:d REG0=VGPR32_B():w:d REG1=XMM_R():r:d

x86_64 X86_LEGACY DATAXFER AVX source: xed

XED_VMOVD_X86_LEGACY_ONEBYTE_6E_293933

Encoding

encoding_kindX86_LEGACY
opcode_bytes6E 7E 6E 7E
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l0
requires_modelong
exception_classavx-type-5
cpl3
raw_encodingVV1 0x6E VL128 V66 V0F not64 NOVSR MOD[0b11] MOD=3 REG[rrr] RM[nnn] VV1 0x7E VL128 V66 V0F not64 NOVSR MOD[0b11] MOD=3 REG[rrr] RM[nnn] VV1 0x6E VL128 V66 V0F mode64 norexw_prefix NOVSR MOD[0b11] MOD=3 REG[rrr] RM[nnn] VV1 0x7E VL128 V66 V0F mode64 norexw_prefix NOVSR MOD[0b11] MOD=3 REG[rrr] RM[nnn]

Operands (8)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 REG1 REG d R EXPLICIT MODRM_REG
2 REG2 REG w W EXPLICIT MODRM_REG
3 REG3 REG d R EXPLICIT MODRM_REG
4 REG4 REG w W EXPLICIT MODRM_REG
5 REG5 REG d R EXPLICIT MODRM_REG
6 REG6 REG w W EXPLICIT MODRM_REG
7 REG7 REG d R EXPLICIT MODRM_REG

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.