VMOVDQU64
MEM0:w:qq:u64 REG0=MASK1():r:mskw REG1=YMM_R3():r:qq:u64
x86_64 X86_LEGACY DATAXFER AVX512F_256 source: xed
XED_VMOVDQU64_MEMu64_MASKmskw_YMMu64_AVX512
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | 7F |
| opcode_map | ONEBYTE |
| mandatory_prefix | - |
| has_modrm | True |
| vex_l | 1 |
| attributes | DISP8_FULLMEM MASKOP_EVEX MEMORY_FAULT_SUPPRESSION |
| exception_class | AVX512-E4 |
| cpl | 3 |
| raw_encoding | EVV 0x7F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() BCRC=0 UBIT=1 W1 VL256 NOEVSR ZEROING=0 ESIZE_64_BITS() NELEM_FULLMEM() |
Operands (3)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | MEM0 | MEM | w | W | EXPLICIT | MODRM_RM | |
| 1 | REG0 | REG | R | EXPLICIT | MODRM_REG | ||
| 2 | REG1 | REG | R | EXPLICIT | MODRM_REG |
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.