VMPSADBW

REG0=XMM_R3():w:dq:u16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:u8 MEM0:r:dq:u8 IMM0:r:b

x86_64 X86_LEGACY AVX512 AVX512_MEDIAX_128 source: xed

XED_VMPSADBW_XMMu16_MASKmskw_XMMu8_MEMu8_IMM8_AVX512

Encoding

encoding_kindX86_LEGACY
opcode_bytes42
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l0
imm_size_bytes1
attributesDISP8_FULLMEM MASKOP_EVEX
exception_classAVX512-E4NF
cpl3
raw_encodingEVV 0x42 VF3 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() BCRC=0 UBIT=1 W0 VL128 UIMM8() ESIZE_16_BITS() NELEM_FULLMEM()

Operands (5)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 REG1 REG R EXPLICIT MODRM_REG
2 REG2 REG R EXPLICIT MODRM_REG
3 MEM0 MEM R EXPLICIT MODRM_RM
4 IMM0 IMM b R EXPLICIT IMM

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.