VMULBF16

REG0=YMM_R3():w:qq:bf16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=YMM_N3():r:qq:bf16 MEM0:r:vv:bf16:TXT=BCASTSTR

x86_64 X86_LEGACY AVX512 AVX10_2_BF16_256 source: xed

XED_VMULBF16_YMMbf16_MASKmskw_YMMbf16_MEMbf16_AVX512

Encoding

encoding_kindX86_LEGACY
opcode_bytes59
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l1
attributesBROADCAST_ENABLED DISP8_FULL FIXED_ROUNDING_RNE FLUSH_INPUT_DENORM FLUSH_OUTPUT_DENORM MASKOP_EVEX MEMORY_FAULT_SUPPRESSION
exception_classAVX512-E4
cpl3
raw_encodingEVV 0x59 V66 MAP5 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() UBIT=1 W0 VL256 ESIZE_16_BITS() NELEM_FULL()

Operands (4)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 REG1 REG R EXPLICIT MODRM_REG
2 REG2 REG R EXPLICIT MODRM_REG
3 MEM0 MEM R EXPLICIT MODRM_RM

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.