VMULBF16

REG0=ZMM_R3():w:zbf16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_N3():r:zbf16 REG3=ZMM_B3():r:zbf16

x86_64 X86_LEGACY AVX512 AVX10_2_BF16_512 source: xed

XED_VMULBF16_ZMMbf16_MASKmskw_ZMMbf16_ZMMbf16_AVX512

Encoding

encoding_kindX86_LEGACY
opcode_bytes59
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l2
attributesFIXED_ROUNDING_RNE FLUSH_INPUT_DENORM FLUSH_OUTPUT_DENORM MASKOP_EVEX
exception_classAVX512-E4
cpl3
raw_encodingEVV 0x59 V66 MAP5 MOD[0b11] MOD=3 BCRC=0 UBIT=1 REG[rrr] RM[nnn] W0 VL512

Operands (4)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 REG1 REG R EXPLICIT MODRM_REG
2 REG2 REG R EXPLICIT MODRM_REG
3 REG3 REG R EXPLICIT MODRM_REG

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.