VP4DPWSSD
REG0=ZMM_R3():rw:zi32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_N3():r:zi16:MULTISOURCE4 MEM0:r:dq:u32
x86_64 X86_LEGACY AVX512_4VNNIW AVX512_4VNNIW_512 source: xed
XED_VP4DPWSSD_ZMMi32_MASKmskw_ZMMi16_MEMu32_AVX512
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | 52 |
| opcode_map | ONEBYTE |
| mandatory_prefix | - |
| has_modrm | True |
| vex_l | 2 |
| attributes | MEMORY_FAULT_SUPPRESSION MULTISOURCE4 DISP8_TUPLE1_4X MASKOP_EVEX |
| exception_class | AVX512-E4 |
| cpl | 3 |
| raw_encoding | EVV 0x52 VF2 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[rrr] RM[nnn] MODRM() BCRC=0 VL512 W0 ESIZE_32_BITS() NELEM_TUPLE1_4X() |
Operands (4)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | REG0 | REG | RW | EXPLICIT | MODRM_REG | ||
| 1 | REG1 | REG | R | EXPLICIT | MODRM_REG | ||
| 2 | REG2 | REG | R | EXPLICIT | MODRM_REG | ||
| 3 | MEM0 | MEM | R | EXPLICIT | MODRM_RM |
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.