VPABSW

AVX512 AVX512BW_128 x86_64

8 encoding forms.

XED_VPABSW_X86_LEGACY_ONEBYTE_1D_151508
REG0=XMM_R():w:dq:u16 MEM0:r:dq:i16 REG0=XMM_R():w:dq:u16 REG1=XMM_B():r:dq:i16
X86_LEGACY 1D 1D /r AVX
XED_VPABSW_X86_LEGACY_ONEBYTE_1D_364322
REG0=YMM_R():w:qq:u16 MEM0:r:qq:i16 REG0=YMM_R():w:qq:u16 REG1=YMM_B():r:qq:i16
X86_LEGACY 1D 1D /r AVX2
XED_VPABSW_XMMi16_MASKmskw_MEMi16_AVX512
REG0=XMM_R3():w:dq:i16 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:dq:i16
X86_LEGACY 1D /r AVX512BW_128
XED_VPABSW_XMMi16_MASKmskw_XMMi16_AVX512
REG0=XMM_R3():w:dq:i16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_B3():r:dq:i16
X86_LEGACY 1D /r AVX512BW_128
XED_VPABSW_YMMi16_MASKmskw_MEMi16_AVX512
REG0=YMM_R3():w:qq:i16 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:qq:i16
X86_LEGACY 1D /r AVX512BW_256
XED_VPABSW_YMMi16_MASKmskw_YMMi16_AVX512
REG0=YMM_R3():w:qq:i16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=YMM_B3():r:qq:i16
X86_LEGACY 1D /r AVX512BW_256
XED_VPABSW_ZMMi16_MASKmskw_MEMi16_AVX512
REG0=ZMM_R3():w:zi16 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:zd:i16
X86_LEGACY 1D /r AVX512BW_512
XED_VPABSW_ZMMi16_MASKmskw_ZMMi16_AVX512
REG0=ZMM_R3():w:zi16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_B3():r:zi16
X86_LEGACY 1D /r AVX512BW_512