VPALIGNR
AVX512 AVX512BW_128 x86_64
11 encoding forms.
X86_VPALIGNR_X86_LEGACY_ONEBYTE_0F_167550
ymm, ymm, ymm/m256, imm8
X86_VPALIGNR_X86_LEGACY_ONEBYTE_0F_554171
xyz {kz}, xyz, xyz/mxyz, imm8
X86_VPALIGNR_X86_LEGACY_ONEBYTE_0F_830127
xmm, xmm, xmm/m128, imm8
XED_VPALIGNR_X86_LEGACY_0F_0F_473204
REG0=YMM_R():w:qq:u8 REG1=YMM_N():r:qq:u8 MEM0:r:qq:u8 IMM0:r:b REG0=YMM_R():w:qq:u8 REG1=YMM_N():r:qq:u8 REG2=YMM_B():r:qq:u8 IMM0:r:b
XED_VPALIGNR_X86_LEGACY_0F_0F_505109
REG0=XMM_R():w:dq:u8 REG1=XMM_N():r:dq:u8 MEM0:r:dq:u8 IMM0:r:b REG0=XMM_R():w:dq:u8 REG1=XMM_N():r:dq:u8 REG2=XMM_B():r:dq:u8 IMM0:r:b
XED_VPALIGNR_XMMu8_MASKmskw_XMMu8_MEMu8_IMM8_AVX512
REG0=XMM_R3():w:dq:u8 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:u8 MEM0:r:dq:u8 IMM0:r:b
XED_VPALIGNR_XMMu8_MASKmskw_XMMu8_XMMu8_IMM8_AVX512
REG0=XMM_R3():w:dq:u8 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:u8 REG3=XMM_B3():r:dq:u8 IMM0:r:b
XED_VPALIGNR_YMMu8_MASKmskw_YMMu8_MEMu8_IMM8_AVX512
REG0=YMM_R3():w:qq:u8 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=YMM_N3():r:qq:u8 MEM0:r:qq:u8 IMM0:r:b
XED_VPALIGNR_YMMu8_MASKmskw_YMMu8_YMMu8_IMM8_AVX512
REG0=YMM_R3():w:qq:u8 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=YMM_N3():r:qq:u8 REG3=YMM_B3():r:qq:u8 IMM0:r:b
XED_VPALIGNR_ZMMu8_MASKmskw_ZMMu8_MEMu8_IMM8_AVX512
REG0=ZMM_R3():w:zu8 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_N3():r:zu8 MEM0:r:zd:u8 IMM0:r:b
XED_VPALIGNR_ZMMu8_MASKmskw_ZMMu8_ZMMu8_IMM8_AVX512
REG0=ZMM_R3():w:zu8 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_N3():r:zu8 REG3=ZMM_B3():r:zu8 IMM0:r:b