VPBLENDD

REG0=XMM_R():w:dq:u32 REG1=XMM_N():r:dq:u32 MEM0:r:dq:u32 IMM0:r:b REG0=XMM_R():w:dq:u32 REG1=XMM_N():r:dq:u32 REG2=XMM_B():r:dq:u32 IMM0:r:b REG0=YMM_R():w:qq:u32 REG1=YMM_N():r:qq:u32 MEM0:r:qq:u32 IMM0:r:b REG0=YMM_R():w:qq:u32 REG1=YMM_N():r:qq:u32 REG2=YMM_B():r:qq:u32 IMM0:r:b

x86_64 X86_LEGACY AVX2 AVX2 source: xed

XED_VPBLENDD_X86_LEGACY_ONEBYTE_02_326960

Encoding

encoding_kindX86_LEGACY
opcode_bytes02 02 02 02
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l1
imm_size_bytes1
exception_classavx-type-4
cpl3
raw_encodingVV1 0x02 VL128 V66 V0F3A W0 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() UIMM8() VV1 0x02 VL128 V66 V0F3A W0 MOD[0b11] MOD=3 REG[rrr] RM[nnn] UIMM8() VV1 0x02 VL256 V66 V0F3A W0 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() UIMM8() VV1 0x02 VL256 V66 V0F3A W0 MOD[0b11] MOD=3 REG[rrr] RM[nnn] UIMM8()

Operands (16)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 REG1 REG R EXPLICIT MODRM_REG
2 MEM0 MEM R EXPLICIT MODRM_RM
3 IMM0 IMM b R EXPLICIT IMM
4 REG2 REG w W EXPLICIT MODRM_REG
5 REG3 REG R EXPLICIT MODRM_REG
6 REG4 REG R EXPLICIT MODRM_REG
7 IMM1 IMM b R EXPLICIT IMM
8 REG5 REG w W EXPLICIT MODRM_REG
9 REG6 REG R EXPLICIT MODRM_REG
10 MEM1 MEM R EXPLICIT MODRM_RM
11 IMM2 IMM b R EXPLICIT IMM
12 REG7 REG w W EXPLICIT MODRM_REG
13 REG8 REG R EXPLICIT MODRM_REG
14 REG9 REG R EXPLICIT MODRM_REG
15 IMM3 IMM b R EXPLICIT IMM

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.