VPCMPESTRM

REG0=XMM_R():r:dq MEM0:r:dq IMM0:r:b REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_EDX:r:SUPP REG3=XED_REG_XMM0:w:dq:SUPP REG0=XMM_R():r:dq REG1=XMM_B():r:dq IMM0:r:b REG2=XED_REG_EAX:r:SUPP REG3=XED_REG_EDX:r:SUPP REG4=XED_REG_XMM0:w:dq:SUPP REG0=XMM_R():r:dq MEM0:r:dq IMM0:r:b REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_EDX:r:SUPP REG3=XED_REG_XMM0:w:dq:SUPP REG0=XMM_R():r:dq REG1=XMM_B():r:dq IMM0:r:b REG2=XED_REG_EAX:r:SUPP REG3=XED_REG_EDX:r:SUPP REG4=XED_REG_XMM0:w:dq:SUPP

x86_64 X86_LEGACY STTNI AVX source: xed

XED_VPCMPESTRM_X86_LEGACY_ONEBYTE_60_202024

Encoding

encoding_kind	X86_LEGACY
opcode_bytes	60 60 60 60
opcode_map	ONEBYTE
mandatory_prefix	-
has_modrm	True
vex_l	0
imm_size_bytes	1
requires_mode	long
exception_class	avx-type-4
cpl	3
raw_encoding	VV1 0x60 VL128 V66 V0F3A NOVSR not64 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() UIMM8() VV1 0x60 VL128 V66 V0F3A NOVSR not64 MOD[0b11] MOD=3 REG[rrr] RM[nnn] UIMM8() VV1 0x60 VL128 V66 V0F3A NOVSR mode64 W0 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() UIMM8() VV1 0x60 VL128 V66 V0F3A NOVSR mode64 W0 MOD[0b11] MOD=3 REG[rrr] RM[nnn] UIMM8()

Operands (24)

#	Role	Kind	Class / Reg	Width	Access	Visibility	Encoded in
0	REG0	REG			R	EXPLICIT	MODRM_REG
1	MEM0	MEM			R	EXPLICIT	MODRM_RM
2	IMM0	IMM		b	R	EXPLICIT	IMM
3	REG1	REG	(=EAX)		R	SUPPRESSED	MODRM_REG
4	REG2	REG	(=EDX)		R	SUPPRESSED	MODRM_REG
5	REG3	REG	(=XMM0)	w	W	SUPPRESSED	MODRM_REG
6	REG4	REG			R	EXPLICIT	MODRM_REG
7	REG5	REG			R	EXPLICIT	MODRM_REG
8	IMM1	IMM		b	R	EXPLICIT	IMM
9	REG6	REG	(=EAX)		R	SUPPRESSED	MODRM_REG
10	REG7	REG	(=EDX)		R	SUPPRESSED	MODRM_REG
11	REG8	REG	(=XMM0)	w	W	SUPPRESSED	MODRM_REG
12	REG9	REG			R	EXPLICIT	MODRM_REG
13	MEM1	MEM			R	EXPLICIT	MODRM_RM
14	IMM2	IMM		b	R	EXPLICIT	IMM
15	REG10	REG	(=EAX)		R	SUPPRESSED	MODRM_REG
16	REG11	REG	(=EDX)		R	SUPPRESSED	MODRM_REG
17	REG12	REG	(=XMM0)	w	W	SUPPRESSED	MODRM_REG
18	REG13	REG			R	EXPLICIT	MODRM_REG
19	REG14	REG			R	EXPLICIT	MODRM_REG
20	IMM3	IMM		b	R	EXPLICIT	IMM
21	REG15	REG	(=EAX)		R	SUPPRESSED	MODRM_REG
22	REG16	REG	(=EDX)		R	SUPPRESSED	MODRM_REG
23	REG17	REG	(=XMM0)	w	W	SUPPRESSED	MODRM_REG

Flag effects (6)

CF = WRITE PF = SET_0 AF = SET_0 ZF = WRITE SF = WRITE OF = WRITE

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.