VPDPWSSD

REG0=XMM_R():rw:dq:i32 REG1=XMM_N():r:dq:u32 REG2=XMM_B():r:dq:u32

x86_64 X86_LEGACY VEX AVX_VNNI source: xed

XED_VPDPWSSD_XMMi32_XMMu32_XMMu32

Encoding

encoding_kindX86_LEGACY
opcode_bytes52
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l0
exception_classavx-type-4
cpl3
raw_encodingVV1 0x52 V66 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] VL128 W0

Operands (3)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG RW EXPLICIT MODRM_REG
1 REG1 REG R EXPLICIT MODRM_REG
2 REG2 REG R EXPLICIT MODRM_REG

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.