VPERM2F128

REG0=YMM_R():w:qq:f64 REG1=YMM_N():r:qq:f64 MEM0:r:qq:f64 IMM0:r:b REG0=YMM_R():w:qq:f64 REG1=YMM_N():r:qq:f64 REG2=YMM_B():r:qq:f64 IMM0:r:b

x86_64 X86_LEGACY AVX AVX source: xed

XED_VPERM2F128_X86_LEGACY_ONEBYTE_06_714142

Encoding

encoding_kindX86_LEGACY
opcode_bytes06 06
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l1
imm_size_bytes1
exception_classavx-type-6
cpl3
raw_encodingVV1 0x06 VL256 V66 V0F3A norexw_prefix MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() UIMM8() VV1 0x06 VL256 V66 V0F3A norexw_prefix MOD[0b11] MOD=3 REG[rrr] RM[nnn] UIMM8()

Operands (8)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 REG1 REG f64 R EXPLICIT MODRM_REG
2 MEM0 MEM f64 R EXPLICIT MODRM_RM
3 IMM0 IMM b R EXPLICIT IMM
4 REG2 REG w W EXPLICIT MODRM_REG
5 REG3 REG f64 R EXPLICIT MODRM_REG
6 REG4 REG f64 R EXPLICIT MODRM_REG
7 IMM1 IMM b R EXPLICIT IMM

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.