VPERMIL2PS
XOP XOP x86_64
VPERMIL2PS is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category XOP. This page lists its 5 encoding forms, distinguished by opcode byte: 48.
Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.
X86_VPERMIL2PS_X86_LEGACY_ONEBYTE_48_335482
xmm, xmm, xmm/m128, xmm, imm4
X86_VPERMIL2PS_X86_LEGACY_ONEBYTE_48_45034
ymm, ymm, ymm, ymm/m256, imm4
X86_VPERMIL2PS_X86_LEGACY_ONEBYTE_48_804151
ymm, ymm, ymm/m256, ymm, imm4
X86_VPERMIL2PS_X86_LEGACY_ONEBYTE_48_929025
xmm, xmm, xmm, xmm/m128, imm4
XED_VPERMIL2PS_X86_LEGACY_ONEBYTE_48_815789
REG0=XMM_R():w:dq:f32 REG1=XMM_N():r:dq:f32 MEM0:r:dq:f32 REG2=XMM_SE():r:dq:f32 IMM0:r:b REG0=XMM_R():w:dq:f32 REG1=XMM_N():r:dq:f32 REG2=XMM_B():r:dq:f32 REG3=XMM_SE():r:dq:f32 IMM0:r:b REG0=YMM_R():w:qq:f32 REG1=YMM_N():r:qq:f32 MEM0:r:qq:f32 REG2=YMM_SE():r:qq:f32 IMM0:r:b REG0=YMM_R():w:qq:f32 REG1=YMM_N():r:qq:f32 REG2=YMM_B():r:qq:f32 REG3=YMM_SE():r:qq:f32 IMM0:r:b REG0=XMM_R():w:dq:f32 REG1=XMM_N():r:dq:f32 REG2=XMM_SE():r:dq:f32 MEM0:r:dq:f32 IMM0:r:b REG0=XMM_R():w:dq:f32 REG1=XMM_N():r:dq:f32 REG2=XMM_SE():r:dq:f32 REG3=XMM_B():r:dq:f32 IMM0:r:b REG0=YMM_R():w:qq:f32 REG1=YMM_N():r:qq:f32 REG2=YMM_SE():r:qq:f32 MEM0:r:qq:f32 IMM0:r:b REG0=YMM_R():w:qq:f32 REG1=YMM_N():r:qq:f32 REG2=YMM_SE():r:qq:f32 REG3=YMM_B():r:qq:f32 IMM0:r:b