VPEXTRD

MEM0:w:d REG0=XMM_R():r:dq:u32 IMM0:r:b REG0=VGPR32_B():w:d REG1=XMM_R():r:dq:u32 IMM0:r:b MEM0:w:d REG0=XMM_R():r:dq:u32 IMM0:r:b REG0=VGPR32_B():w:d REG1=XMM_R():r:dq:u32 IMM0:r:b

x86_64 X86_LEGACY AVX512 AVX source: xed

XED_VPEXTRD_X86_LEGACY_ONEBYTE_16_322440

Encoding

encoding_kindX86_LEGACY
opcode_bytes16 16 16 16
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l0
imm_size_bytes1
requires_modelong
exception_classavx-type-5
cpl3
raw_encodingVV1 0x16 VL128 V66 V0F3A mode64 norexw_prefix NOVSR MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() UIMM8() VV1 0x16 VL128 V66 V0F3A mode64 norexw_prefix NOVSR MOD[0b11] MOD=3 REG[rrr] RM[nnn] UIMM8() VV1 0x16 VL128 V66 V0F3A not64 NOVSR MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() UIMM8() VV1 0x16 VL128 V66 V0F3A not64 NOVSR MOD[0b11] MOD=3 REG[rrr] RM[nnn] UIMM8()

Operands (12)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 MEM0 MEM w W EXPLICIT MODRM_RM
1 REG0 REG R EXPLICIT MODRM_REG
2 IMM0 IMM b R EXPLICIT IMM
3 REG1 REG w W EXPLICIT MODRM_REG
4 REG2 REG R EXPLICIT MODRM_REG
5 IMM1 IMM b R EXPLICIT IMM
6 MEM1 MEM w W EXPLICIT MODRM_RM
7 REG3 REG R EXPLICIT MODRM_REG
8 IMM2 IMM b R EXPLICIT IMM
9 REG4 REG w W EXPLICIT MODRM_REG
10 REG5 REG R EXPLICIT MODRM_REG
11 IMM3 IMM b R EXPLICIT IMM

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.