VPEXTRW
AVX512 AVX512BW_128N x86_64
VPEXTRW is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category AVX512. This page lists its 4 encoding forms, distinguished by opcode bytes: 15, C5.
Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.
X86_VPEXTRW_X86_LEGACY_ONEBYTE_C5_718487
r32[15:0], xmm, imm8
XED_VPEXTRW_GPR32d_XMMdq_IMMb_15 VPEXTRW_GPR32d_XMMdq_IMMb_C5
MEM0:w:w REG0=XMM_R():r:dq:u16 IMM0:r:b REG0=VGPR32_B():w:d REG1=XMM_R():r:dq:u16 IMM0:r:b REG0=VGPR32_R():w:d REG1=XMM_B():r:dq:u16 IMM0:r:b
XED_VPEXTRW_GPR32u16_XMMu16_IMM8_AVX512
REG0=GPR32_B():w:d:u16 REG1=XMM_R3():r:dq:u16 IMM0:r:b
XED_VPEXTRW_MEMu16_XMMu16_IMM8_AVX512
MEM0:w:wrd:u16 REG0=XMM_R3():r:dq:u16 IMM0:r:b