VPHSUBD
AVX AVX x86_64
VPHSUBD is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category AVX. This page lists its 4 encoding forms, distinguished by opcode byte: 06.
Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.
X86_VPHSUBD_X86_LEGACY_ONEBYTE_06_154510
xmm, xmm, xmm/m128
X86_VPHSUBD_X86_LEGACY_ONEBYTE_06_292152
ymm, ymm, ymm/m256
XED_VPHSUBD_X86_LEGACY_ONEBYTE_06_427727
REG0=YMM_R():w:qq:i32 REG1=YMM_N():r:qq:i32 MEM0:r:qq:i32 REG0=YMM_R():w:qq:i32 REG1=YMM_N():r:qq:i32 REG2=YMM_B():r:qq:i32
XED_VPHSUBD_X86_LEGACY_ONEBYTE_06_963452
REG0=XMM_R():w:dq:i32 REG1=XMM_N():r:dq:i32 MEM0:r:dq:i32 REG0=XMM_R():w:dq:i32 REG1=XMM_N():r:dq:i32 REG2=XMM_B():r:dq:i32