VPINSRQ
AVX512 AVX512DQ_128N x86_64
VPINSRQ is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category AVX512. This page lists its 3 encoding forms, distinguished by opcode byte: 22.
Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.
XED_VPINSRQ_X86_LEGACY_ONEBYTE_22_293446
REG0=XMM_R():w:dq:u64 REG1=XMM_N():r:dq:u64 MEM0:r:q:u64 IMM0:r:b REG0=XMM_R():w:dq:u64 REG1=XMM_N():r:dq:u64 REG2=VGPR64_B():r:q:u64 IMM0:r:b
XED_VPINSRQ_XMMu64_XMMu64_GPR64u64_IMM8_AVX512
REG0=XMM_R3():w:dq:u64 REG1=XMM_N3():r:dq:u64 REG2=GPR64_B():r:q:u64 IMM0:r:b
XED_VPINSRQ_XMMu64_XMMu64_MEMu64_IMM8_AVX512
REG0=XMM_R3():w:dq:u64 REG1=XMM_N3():r:dq:u64 MEM0:r:q:u64 IMM0:r:b