VPMADCSSWD

REG0=XMM_R():w:dq:i32 REG1=XMM_N():r:dq:i16 MEM0:r:dq:i16 REG2=XMM_SE():r:dq:i32 REG0=XMM_R():w:dq:i32 REG1=XMM_N():r:dq:i16 REG2=XMM_B():r:dq:i16 REG3=XMM_SE():r:dq:i32

x86_64 X86_LEGACY XOP XOP source: xed

XED_VPMADCSSWD_X86_LEGACY_ONEBYTE_A6_448339

Encoding

encoding_kindX86_LEGACY
opcode_bytesA6 A6
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l0
attributesAMDONLY
cpl3
raw_encodingXOPV 0xA6 VNP W0 VL128 XMAP8 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() SE_IMM8() XOPV 0xA6 VNP W0 VL128 XMAP8 MOD[0b11] MOD=3 REG[rrr] RM[nnn] SE_IMM8()

Operands (8)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 REG1 REG R EXPLICIT MODRM_REG
2 MEM0 MEM R EXPLICIT MODRM_RM
3 REG2 REG R EXPLICIT MODRM_REG
4 REG3 REG w W EXPLICIT MODRM_REG
5 REG4 REG R EXPLICIT MODRM_REG
6 REG5 REG R EXPLICIT MODRM_REG
7 REG6 REG R EXPLICIT MODRM_REG

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.