VPMADD52LUQ

REG0=YMM_R():rw:qq:u64 REG1=YMM_N():r:qq:u64 MEM0:r:qq:u64

x86_64 X86_LEGACY AVX_IFMA AVX_IFMA source: xed

XED_VPMADD52LUQ_YMMu64_YMMu64_MEMu64

Encoding

encoding_kindX86_LEGACY
opcode_bytesB4
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l1
exception_classavx-type-4
cpl3
raw_encodingVV1 0xB4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1

Operands (3)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG RW EXPLICIT MODRM_REG
1 REG1 REG R EXPLICIT MODRM_REG
2 MEM0 MEM R EXPLICIT MODRM_RM

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.