VPMAXSD
AVX512 AVX512F_128 x86_64
8 encoding forms.
XED_VPMAXSD_X86_LEGACY_ONEBYTE_3D_326647
REG0=XMM_R():w:dq:i32 REG1=XMM_N():r:dq:i32 MEM0:r:dq:i32 REG0=XMM_R():w:dq:i32 REG1=XMM_N():r:dq:i32 REG2=XMM_B():r:dq:i32
XED_VPMAXSD_X86_LEGACY_ONEBYTE_3D_832904
REG0=YMM_R():w:qq:i32 REG1=YMM_N():r:qq:i32 MEM0:r:qq:i32 REG0=YMM_R():w:qq:i32 REG1=YMM_N():r:qq:i32 REG2=YMM_B():r:qq:i32
XED_VPMAXSD_XMMi32_MASKmskw_XMMi32_MEMi32_AVX512
REG0=XMM_R3():w:dq:i32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:i32 MEM0:r:vv:i32:TXT=BCASTSTR
XED_VPMAXSD_XMMi32_MASKmskw_XMMi32_XMMi32_AVX512
REG0=XMM_R3():w:dq:i32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:i32 REG3=XMM_B3():r:dq:i32
XED_VPMAXSD_YMMi32_MASKmskw_YMMi32_MEMi32_AVX512
REG0=YMM_R3():w:qq:i32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=YMM_N3():r:qq:i32 MEM0:r:vv:i32:TXT=BCASTSTR
XED_VPMAXSD_YMMi32_MASKmskw_YMMi32_YMMi32_AVX512
REG0=YMM_R3():w:qq:i32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=YMM_N3():r:qq:i32 REG3=YMM_B3():r:qq:i32
XED_VPMAXSD_ZMMi32_MASKmskw_ZMMi32_MEMi32_AVX512
REG0=ZMM_R3():w:zi32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_N3():r:zi32 MEM0:r:vv:i32:TXT=BCASTSTR
XED_VPMAXSD_ZMMi32_MASKmskw_ZMMi32_ZMMi32_AVX512
REG0=ZMM_R3():w:zi32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_N3():r:zi32 REG3=ZMM_B3():r:zi32