VPMAXSW
AVX512 AVX512BW_128 x86_64
8 encoding forms.
XED_VPMAXSW_X86_LEGACY_ONEBYTE_EE_400069
REG0=YMM_R():w:qq:i16 REG1=YMM_N():r:qq:i16 MEM0:r:qq:i16 REG0=YMM_R():w:qq:i16 REG1=YMM_N():r:qq:i16 REG2=YMM_B():r:qq:i16
XED_VPMAXSW_X86_LEGACY_ONEBYTE_EE_985229
REG0=XMM_R():w:dq:i16 REG1=XMM_N():r:dq:i16 MEM0:r:dq:i16 REG0=XMM_R():w:dq:i16 REG1=XMM_N():r:dq:i16 REG2=XMM_B():r:dq:i16
XED_VPMAXSW_XMMi16_MASKmskw_XMMi16_MEMi16_AVX512
REG0=XMM_R3():w:dq:i16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:i16 MEM0:r:dq:i16
XED_VPMAXSW_XMMi16_MASKmskw_XMMi16_XMMi16_AVX512
REG0=XMM_R3():w:dq:i16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:i16 REG3=XMM_B3():r:dq:i16
XED_VPMAXSW_YMMi16_MASKmskw_YMMi16_MEMi16_AVX512
REG0=YMM_R3():w:qq:i16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=YMM_N3():r:qq:i16 MEM0:r:qq:i16
XED_VPMAXSW_YMMi16_MASKmskw_YMMi16_YMMi16_AVX512
REG0=YMM_R3():w:qq:i16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=YMM_N3():r:qq:i16 REG3=YMM_B3():r:qq:i16
XED_VPMAXSW_ZMMi16_MASKmskw_ZMMi16_MEMi16_AVX512
REG0=ZMM_R3():w:zi16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_N3():r:zi16 MEM0:r:zd:i16
XED_VPMAXSW_ZMMi16_MASKmskw_ZMMi16_ZMMi16_AVX512
REG0=ZMM_R3():w:zi16 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_N3():r:zi16 REG3=ZMM_B3():r:zi16