VPMOVSQB

DATAXFER AVX512F_128 x86_64

6 encoding forms.

XED_VPMOVSQB_MEMi8_MASKmskw_XMMi64_AVX512
MEM0:w:wrd:i8 REG0=MASK1():r:mskw REG1=XMM_R3():r:dq:i64
X86_LEGACY 22 /r AVX512F_128
XED_VPMOVSQB_MEMi8_MASKmskw_YMMi64_AVX512
MEM0:w:d:i8 REG0=MASK1():r:mskw REG1=YMM_R3():r:qq:i64
X86_LEGACY 22 /r AVX512F_256
XED_VPMOVSQB_MEMi8_MASKmskw_ZMMi64_AVX512
MEM0:w:q:i8 REG0=MASK1():r:mskw REG1=ZMM_R3():r:zi64
X86_LEGACY 22 /r AVX512F_512
XED_VPMOVSQB_XMMi8_MASKmskw_XMMi64_AVX512
REG0=XMM_B3():w:dq:i8 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_R3():r:dq:i64
X86_LEGACY 22 /r AVX512F_128
XED_VPMOVSQB_XMMi8_MASKmskw_YMMi64_AVX512
REG0=XMM_B3():w:dq:i8 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=YMM_R3():r:qq:i64
X86_LEGACY 22 /r AVX512F_256
XED_VPMOVSQB_XMMi8_MASKmskw_ZMMi64_AVX512
REG0=XMM_B3():w:dq:i8 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_R3():r:zi64
X86_LEGACY 22 /r AVX512F_512