VPMOVSXWQ

DATAXFER AVX512F_128 x86_64

8 encoding forms.

XED_VPMOVSXWQ_X86_LEGACY_ONEBYTE_24_240927
REG0=YMM_R():w:qq:i64 REG1=XMM_B():r:q:i16 REG0=YMM_R():w:qq:i64 MEM0:r:q:i16
X86_LEGACY 24 24 /r AVX2
XED_VPMOVSXWQ_X86_LEGACY_ONEBYTE_24_953195
REG0=XMM_R():w:dq:i64 REG1=XMM_B():r:d:i16 REG0=XMM_R():w:dq:i64 MEM0:r:d:i16
X86_LEGACY 24 24 /r AVX
XED_VPMOVSXWQ_XMMi64_MASKmskw_MEMi16_AVX512
REG0=XMM_R3():w:dq:i64 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:d:i16
X86_LEGACY 24 /r AVX512F_128
XED_VPMOVSXWQ_XMMi64_MASKmskw_XMMi16_AVX512
REG0=XMM_R3():w:dq:i64 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_B3():r:dq:i16
X86_LEGACY 24 /r AVX512F_128
XED_VPMOVSXWQ_YMMi64_MASKmskw_MEMi16_AVX512
REG0=YMM_R3():w:qq:i64 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:q:i16
X86_LEGACY 24 /r AVX512F_256
XED_VPMOVSXWQ_YMMi64_MASKmskw_XMMi16_AVX512
REG0=YMM_R3():w:qq:i64 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_B3():r:dq:i16
X86_LEGACY 24 /r AVX512F_256
XED_VPMOVSXWQ_ZMMi64_MASKmskw_MEMi16_AVX512
REG0=ZMM_R3():w:zi64 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:dq:i16
X86_LEGACY 24 /r AVX512F_512
XED_VPMOVSXWQ_ZMMi64_MASKmskw_XMMi16_AVX512
REG0=ZMM_R3():w:zi64 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_B3():r:dq:i16
X86_LEGACY 24 /r AVX512F_512