VPMOVZXDQ

DATAXFER AVX512F_128 x86_64

8 encoding forms.

XED_VPMOVZXDQ_X86_LEGACY_ONEBYTE_35_35175
REG0=YMM_R():w:qq:u64 REG1=XMM_B():r:dq:u32 REG0=YMM_R():w:qq:u64 MEM0:r:dq:u32
X86_LEGACY 35 35 /r AVX2
XED_VPMOVZXDQ_X86_LEGACY_ONEBYTE_35_669263
REG0=XMM_R():w:dq:u64 REG1=XMM_B():r:q:u32 REG0=XMM_R():w:dq:u64 MEM0:r:q:u32
X86_LEGACY 35 35 /r AVX
XED_VPMOVZXDQ_XMMi64_MASKmskw_MEMi32_AVX512
REG0=XMM_R3():w:dq:i64 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:q:i32
X86_LEGACY 35 /r AVX512F_128
XED_VPMOVZXDQ_XMMi64_MASKmskw_XMMi32_AVX512
REG0=XMM_R3():w:dq:i64 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_B3():r:dq:i32
X86_LEGACY 35 /r AVX512F_128
XED_VPMOVZXDQ_YMMi64_MASKmskw_MEMi32_AVX512
REG0=YMM_R3():w:qq:i64 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:dq:i32
X86_LEGACY 35 /r AVX512F_256
XED_VPMOVZXDQ_YMMi64_MASKmskw_XMMi32_AVX512
REG0=YMM_R3():w:qq:i64 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_B3():r:dq:i32
X86_LEGACY 35 /r AVX512F_256
XED_VPMOVZXDQ_ZMMi64_MASKmskw_MEMi32_AVX512
REG0=ZMM_R3():w:zi64 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:qq:i32
X86_LEGACY 35 /r AVX512F_512
XED_VPMOVZXDQ_ZMMi64_MASKmskw_YMMi32_AVX512
REG0=ZMM_R3():w:zi64 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=YMM_B3():r:qq:i32
X86_LEGACY 35 /r AVX512F_512