VPPERM

REG0=XMM_R():w:dq:i16 REG1=XMM_N():r:dq:i16 MEM0:r:dq:i16 REG2=XMM_SE():r:dq:i16 REG0=XMM_R():w:dq:i16 REG1=XMM_N():r:dq:i16 REG2=XMM_B():r:dq:i16 REG3=XMM_SE():r:dq:i16 REG0=XMM_R():w:dq:i16 REG1=XMM_N():r:dq:i16 REG2=XMM_SE():r:dq:i16 MEM0:r:dq:i16 REG0=XMM_R():w:dq:i16 REG1=XMM_N():r:dq:i16 REG2=XMM_SE():r:dq:i16 REG3=XMM_B():r:dq:i16

x86_64 X86_LEGACY XOP XOP source: xed

XED_VPPERM_X86_LEGACY_ONEBYTE_A3_556265

Encoding

encoding_kindX86_LEGACY
opcode_bytesA3 A3 A3 A3
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l0
attributesAMDONLY
cpl3
raw_encodingXOPV 0xA3 VNP W0 VL128 XMAP8 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() SE_IMM8() XOPV 0xA3 VNP W0 VL128 XMAP8 MOD[0b11] MOD=3 REG[rrr] RM[nnn] SE_IMM8() XOPV 0xA3 VNP W1 VL128 XMAP8 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() SE_IMM8() XOPV 0xA3 VNP W1 VL128 XMAP8 MOD[0b11] MOD=3 REG[rrr] RM[nnn] SE_IMM8()

Operands (16)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 REG1 REG R EXPLICIT MODRM_REG
2 MEM0 MEM R EXPLICIT MODRM_RM
3 REG2 REG R EXPLICIT MODRM_REG
4 REG3 REG w W EXPLICIT MODRM_REG
5 REG4 REG R EXPLICIT MODRM_REG
6 REG5 REG R EXPLICIT MODRM_REG
7 REG6 REG R EXPLICIT MODRM_REG
8 REG7 REG w W EXPLICIT MODRM_REG
9 REG8 REG R EXPLICIT MODRM_REG
10 REG9 REG R EXPLICIT MODRM_REG
11 MEM1 MEM R EXPLICIT MODRM_RM
12 REG10 REG w W EXPLICIT MODRM_REG
13 REG11 REG R EXPLICIT MODRM_REG
14 REG12 REG R EXPLICIT MODRM_REG
15 REG13 REG R EXPLICIT MODRM_REG

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.