VPROLQ

AVX512 AVX512F_128 x86_64

6 encoding forms.

XED_VPROLQ_XMMu64_MASKmskw_MEMu64_IMM8_AVX512
REG0=XMM_N3():w:dq:u64 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:vv:u64:TXT=BCASTSTR IMM0:r:b
X86_LEGACY 72 /1 AVX512F_128
XED_VPROLQ_XMMu64_MASKmskw_XMMu64_IMM8_AVX512
REG0=XMM_N3():w:dq:u64 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_B3():r:dq:u64 IMM0:r:b
X86_LEGACY 72 /1 AVX512F_128
XED_VPROLQ_YMMu64_MASKmskw_MEMu64_IMM8_AVX512
REG0=YMM_N3():w:qq:u64 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:vv:u64:TXT=BCASTSTR IMM0:r:b
X86_LEGACY 72 /1 AVX512F_256
XED_VPROLQ_YMMu64_MASKmskw_YMMu64_IMM8_AVX512
REG0=YMM_N3():w:qq:u64 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=YMM_B3():r:qq:u64 IMM0:r:b
X86_LEGACY 72 /1 AVX512F_256
XED_VPROLQ_ZMMu64_MASKmskw_MEMu64_IMM8_AVX512
REG0=ZMM_N3():w:zu64 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:vv:u64:TXT=BCASTSTR IMM0:r:b
X86_LEGACY 72 /1 AVX512F_512
XED_VPROLQ_ZMMu64_MASKmskw_ZMMu64_IMM8_AVX512
REG0=ZMM_N3():w:zu64 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_B3():r:zu64 IMM0:r:b
X86_LEGACY 72 /1 AVX512F_512