VPSHAD
XOP XOP x86_64
VPSHAD is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category XOP. This page lists its 3 encoding forms, distinguished by opcode byte: 9A.
Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.
X86_VPSHAD_X86_LEGACY_ONEBYTE_9A_154510
xmm, xmm, xmm/m128
X86_VPSHAD_X86_LEGACY_ONEBYTE_9A_383973
xmm, xmm/m128, xmm
XED_VPSHAD_X86_LEGACY_ONEBYTE_9A_323376
REG0=XMM_R():w:dq:i32 MEM0:r:dq:i32 REG1=XMM_N():r:dq:i32 REG0=XMM_R():w:dq:i32 REG1=XMM_B():r:dq:i32 REG2=XMM_N():r:dq:i32 REG0=XMM_R():w:dq:i32 REG1=XMM_N():r:dq:i32 MEM0:r:dq:i32 REG0=XMM_R():w:dq:i32 REG1=XMM_N():r:dq:i32 REG2=XMM_B():r:dq:i32