VPSHAW

REG0=XMM_R():w:dq:i16 MEM0:r:dq:i16 REG1=XMM_N():r:dq:i16 REG0=XMM_R():w:dq:i16 REG1=XMM_B():r:dq:i16 REG2=XMM_N():r:dq:i16 REG0=XMM_R():w:dq:i16 REG1=XMM_N():r:dq:i16 MEM0:r:dq:i16 REG0=XMM_R():w:dq:i16 REG1=XMM_N():r:dq:i16 REG2=XMM_B():r:dq:i16

x86_64 X86_LEGACY XOP XOP source: xed

XED_VPSHAW_X86_LEGACY_ONEBYTE_99_715662

Encoding

encoding_kindX86_LEGACY
opcode_bytes99 99 99 99
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l0
attributesAMDONLY
cpl3
raw_encodingXOPV 0x99 VNP W0 VL128 XMAP9 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() XOPV 0x99 VNP W0 VL128 XMAP9 MOD[0b11] MOD=3 REG[rrr] RM[nnn] XOPV 0x99 VNP W1 VL128 XMAP9 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() XOPV 0x99 VNP W1 VL128 XMAP9 MOD[0b11] MOD=3 REG[rrr] RM[nnn]

Operands (12)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 MEM0 MEM R EXPLICIT MODRM_RM
2 REG1 REG R EXPLICIT MODRM_REG
3 REG2 REG w W EXPLICIT MODRM_REG
4 REG3 REG R EXPLICIT MODRM_REG
5 REG4 REG R EXPLICIT MODRM_REG
6 REG5 REG w W EXPLICIT MODRM_REG
7 REG6 REG R EXPLICIT MODRM_REG
8 MEM1 MEM R EXPLICIT MODRM_RM
9 REG7 REG w W EXPLICIT MODRM_REG
10 REG8 REG R EXPLICIT MODRM_REG
11 REG9 REG R EXPLICIT MODRM_REG

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.