VPSIGNB
AVX AVX x86_64
VPSIGNB is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category AVX. This page lists its 4 encoding forms, distinguished by opcode byte: 08.
Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.
X86_VPSIGNB_X86_LEGACY_ONEBYTE_08_154510
xmm, xmm, xmm/m128
X86_VPSIGNB_X86_LEGACY_ONEBYTE_08_292152
ymm, ymm, ymm/m256
XED_VPSIGNB_X86_LEGACY_ONEBYTE_08_184739
REG0=YMM_R():w:qq:i8 REG1=YMM_N():r:qq:i8 MEM0:r:qq:i8 REG0=YMM_R():w:qq:i8 REG1=YMM_N():r:qq:i8 REG2=YMM_B():r:qq:i8
XED_VPSIGNB_X86_LEGACY_ONEBYTE_08_280733
REG0=XMM_R():w:dq:i8 REG1=XMM_N():r:dq:i8 MEM0:r:dq:i8 REG0=XMM_R():w:dq:i8 REG1=XMM_N():r:dq:i8 REG2=XMM_B():r:dq:i8