VPSRAD

REG0=ZMM_R3():w:zu32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_N3():r:zu32 MEM0:r:dq:u32

x86_64 X86_LEGACY AVX512 AVX512F_512 source: xed

XED_VPSRAD_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512

Encoding

encoding_kindX86_LEGACY
opcode_bytesE2
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l2
attributesMASKOP_EVEX DISP8_MEM128
exception_classAVX512-E4NF
cpl3
raw_encodingEVV 0xE2 V66 V0F MOD[mm] MOD!=3 UBIT=1 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ESIZE_32_BITS() NELEM_MEM128()

Operands (4)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 REG1 REG R EXPLICIT MODRM_REG
2 REG2 REG R EXPLICIT MODRM_REG
3 MEM0 MEM R EXPLICIT MODRM_RM

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.