VPSRLDQ
REG0=ZMM_N3():w:zu8 REG1=ZMM_B3():r:zu8 IMM0:r:b
x86_64 X86_LEGACY AVX512 AVX512BW_512 source: xed
XED_VPSRLDQ_ZMMu8_ZMMu8_IMM8_AVX512
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | 73 |
| opcode_map | ONEBYTE |
| mandatory_prefix | - |
| has_modrm | True |
| modrm.reg = /3 | /3 |
| vex_l | 2 |
| imm_size_bytes | 1 |
| exception_class | AVX512-E4NF |
| cpl | 3 |
| raw_encoding | EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 UBIT=1 REG[0b011] RM[nnn] VL512 ZEROING=0 MASK=0 UIMM8() |
Operands (3)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | REG0 | REG | w | W | EXPLICIT | MODRM_REG | |
| 1 | REG1 | REG | R | EXPLICIT | MODRM_REG | ||
| 2 | IMM0 | IMM | b | R | EXPLICIT | IMM |
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.