VPTESTNMQ

REG0=MASK_R():w:mskw REG1=MASK1():r:mskw REG2=YMM_N3():r:qq:u64 MEM0:r:vv:u64:TXT=BCASTSTR

x86_64 X86_LEGACY LOGICAL AVX512F_256 source: xed

XED_VPTESTNMQ_MASKmskw_MASKmskw_YMMu64_MEMu64_AVX512

Encoding

encoding_kindX86_LEGACY
opcode_bytes27
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l1
attributesBROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION
exception_classAVX512-E4
cpl3
raw_encodingEVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() UBIT=1 W1 VL256 ZEROING=0 ESIZE_64_BITS() NELEM_FULL()

Operands (4)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 REG1 REG R EXPLICIT MODRM_REG
2 REG2 REG R EXPLICIT MODRM_REG
3 MEM0 MEM R EXPLICIT MODRM_RM

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.