VREDUCEPD

AVX512 AVX512DQ_128 x86_64

6 encoding forms.

XED_VREDUCEPD_XMMf64_MASKmskw_MEMf64_IMM8_AVX512
REG0=XMM_R3():w:dq:f64 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:vv:f64:TXT=BCASTSTR IMM0:r:b
X86_LEGACY 56 /r AVX512DQ_128
XED_VREDUCEPD_XMMf64_MASKmskw_XMMf64_IMM8_AVX512
REG0=XMM_R3():w:dq:f64 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_B3():r:dq:f64 IMM0:r:b
X86_LEGACY 56 /r AVX512DQ_128
XED_VREDUCEPD_YMMf64_MASKmskw_MEMf64_IMM8_AVX512
REG0=YMM_R3():w:qq:f64 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:vv:f64:TXT=BCASTSTR IMM0:r:b
X86_LEGACY 56 /r AVX512DQ_256
XED_VREDUCEPD_YMMf64_MASKmskw_YMMf64_IMM8_AVX512
REG0=YMM_R3():w:qq:f64 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=YMM_B3():r:qq:f64 IMM0:r:b
X86_LEGACY 56 /r AVX512DQ_256
XED_VREDUCEPD_ZMMf64_MASKmskw_MEMf64_IMM8_AVX512
REG0=ZMM_R3():w:zf64 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:vv:f64:TXT=BCASTSTR IMM0:r:b
X86_LEGACY 56 /r AVX512DQ_512
XED_VREDUCEPD_ZMMf64_MASKmskw_ZMMf64_IMM8_AVX512
REG0=ZMM_R3():w:zf64 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_B3():r:zf64 IMM0:r:b
X86_LEGACY 56 /r AVX512DQ_512