VRSQRT28PS

REG0=ZMM_R3():w:zf32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_B3():r:zf32

x86_64 X86_LEGACY AVX512 AVX512ER_512 source: xed

XED_VRSQRT28PS_ZMMf32_MASKmskw_ZMMf32_AVX512ER

Encoding

encoding_kindX86_LEGACY
opcode_bytesCC
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l2
attributesMXCSR MASKOP_EVEX
exception_classAVX512-E2
cpl3
raw_encodingEVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 UBIT=1 REG[rrr] RM[nnn] VL512 W0 NOEVSR

Operands (3)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 REG1 REG R EXPLICIT MODRM_REG
2 REG2 REG R EXPLICIT MODRM_REG

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.