VSHUFPD

REG0=XMM_R3():w:dq:f64 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:f64 MEM0:r:vv:f64:TXT=BCASTSTR IMM0:r:b

x86_64 X86_LEGACY AVX512 AVX512F_128 source: xed

XED_VSHUFPD_XMMf64_MASKmskw_XMMf64_MEMf64_IMM8_AVX512

Encoding

encoding_kindX86_LEGACY
opcode_bytesC6
opcode_mapONEBYTE
mandatory_prefix-
has_modrmTrue
vex_l0
imm_size_bytes1
attributesBROADCAST_ENABLED DISP8_FULL MASKOP_EVEX
exception_classAVX512-E4NF
cpl3
raw_encodingEVV 0xC6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() UBIT=1 W1 VL128 UIMM8() ESIZE_64_BITS() NELEM_FULL()

Operands (5)

# Role Kind Class / Reg Width Access Visibility Encoded in
0 REG0 REG w W EXPLICIT MODRM_REG
1 REG1 REG R EXPLICIT MODRM_REG
2 REG2 REG f64 R EXPLICIT MODRM_REG
3 MEM0 MEM f64 R EXPLICIT MODRM_RM
4 IMM0 IMM b R EXPLICIT IMM

Micro-ops sequence (0)

No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.