VSUBSD
REG0=XMM_R():w:dq:f64 REG1=XMM_N():r:dq:f64 MEM0:r:q:f64 REG0=XMM_R():w:dq:f64 REG1=XMM_N():r:dq:f64 REG2=XMM_B():r:q:f64
x86_64 X86_LEGACY AVX512 AVX source: xed
XED_VSUBSD_X86_LEGACY_ONEBYTE_5C_432748
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | 5C 5C |
| opcode_map | ONEBYTE |
| mandatory_prefix | - |
| has_modrm | True |
| attributes | MXCSR SIMD_SCALAR |
| exception_class | avx-type-3 |
| cpl | 3 |
| raw_encoding | VV1 0x5C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VV1 0x5C VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] |
Operands (6)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | REG0 | REG | w | W | EXPLICIT | MODRM_REG | |
| 1 | REG1 | REG | f64 | R | EXPLICIT | MODRM_REG | |
| 2 | MEM0 | MEM | q | R | EXPLICIT | MODRM_RM | |
| 3 | REG2 | REG | w | W | EXPLICIT | MODRM_REG | |
| 4 | REG3 | REG | f64 | R | EXPLICIT | MODRM_REG | |
| 5 | REG4 | REG | q | R | EXPLICIT | MODRM_REG |
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.