WRMSRNS
APX APX_F_MSR_IMM x86_64
WRMSRNS is an instruction of the x86_64 architecture (x86 / x86-64 (covers 16/32/64-bit modes)), category APX. This page lists its 5 encoding forms, distinguished by opcode bytes: 01, F6.
Each form below links to its full decode: the operand roles and where each one is encoded in the instruction, the flag and register effects, and any micro-op sequence authored for it.
X86_WRMSRNS_X86_LEGACY_0F_01_0
(no syntax)
X86_WRMSRNS_X86_LEGACY_ONEBYTE_F6_51510
imm32, r64
XED_WRMSRNS
REG0=XED_REG_EAX:r:SUPP:d:u32 REG1=XED_REG_EDX:r:SUPP:d:u32 REG2=XED_REG_ECX:r:SUPP:d:u32 REG3=XED_REG_MSRS:w:SUPP
XED_WRMSRNS_IMM32_GPR64u64
IMM0:r:d REG0=VGPR64_B():r:q:u64 REG1=XED_REG_MSRS:w:SUPP
XED_WRMSRNS_IMM32_GPR64u64_APX
IMM0:r:d REG0=GPR64_B():r:q:u64 REG1=XED_REG_MSRS:w:SUPP