XCHG
REG0=GPRv_SB():rw REG1=OrAX():rw:IMPL REG0=GPRv_SB():rw REG1=OrAX():rw:IMPL REG0=GPRv_SB():rw REG1=OrAX():rw:IMPL
x86_64 X86_LEGACY DATAXFER I86 source: xed
XED_XCHG_X86_LEGACY_ONEBYTE_00_816468
Encoding
| encoding_kind | X86_LEGACY |
| opcode_bytes | 00 |
| opcode_map | ONEBYTE |
| mandatory_prefix | - |
| has_modrm | False |
| cpl | 3 |
| raw_encoding | 0b1001_0 SRM[rrr] SRM!=0 0b1001_0 SRM[rrr] SRM=0 not_refining_f3 rexb_prefix 0b1001_0 SRM[rrr] SRM=0 not_refining_f3 norexb_prefix rexb4_prefix |
Operands (6)
| # | Role | Kind | Class / Reg | Width | Access | Visibility | Encoded in |
|---|---|---|---|---|---|---|---|
| 0 | REG0 | REG | RW | EXPLICIT | MODRM_REG | ||
| 1 | REG1 | REG | RW | IMPLICIT | MODRM_REG | ||
| 2 | REG2 | REG | RW | EXPLICIT | MODRM_REG | ||
| 3 | REG3 | REG | RW | IMPLICIT | MODRM_REG | ||
| 4 | REG4 | REG | RW | EXPLICIT | MODRM_REG | ||
| 5 | REG5 | REG | RW | IMPLICIT | MODRM_REG |
Micro-ops sequence (0)
No micro-ops authored for this encoding. Emulator semantics not yet defined — decoder still works.